1. Field of the Invention
This invention relates to a semiconductor device including a thin film transistor (hereinafter referred to as TFT) and a capacitor, and a method for preparing the same. This invention also relates to electronic equipment on which a display device having a semiconductor device including a TFT and a capacitor, particularly a liquid crystal display device, an EL display device or a projector, is incorporated as its component, and a method for preparing the same. In this specification, a semiconductor device means any device that can function by using semiconductor characteristics, and all of a display device, a semiconductor circuit and electronic equipment are semiconductor devices.
2. Description of the Related Art
Recently, development of a semiconductor device having an integrated circuit that is formed by a TFT constructed by using a thin film (with a thickness of approximately several nm to several hundred nm) formed on a substrate with an insulating surface is in progress. As a typical example of this, an active-matrix liquid crystal display device is known. Particularly, a TFT using a crystalline silicon film as an active region has high field-effect mobility and therefore can form various functional circuits.
For example, in an active-matrix liquid crystal display device, a pixel circuit for performing image display by each functional block and driving circuits for controlling the pixel circuit such as a shift register circuit, a level shifter circuit, a buffer circuit and a sampling circuit, which are based on CMOS circuits, can be formed on a single substrate, and the circuits can be formed by TFTs.
Semiconductor devices represented by an active-matrix liquid crystal display device are used in more and more occasions and convenience of such devices is demanded accordingly. Development to realize miniaturization, higher brightness, higher definition, lower price and the like has been continued.
For example, an active-matrix liquid crystal display device used for a liquid crystal projector or a display unit of electronic equipment has millions of pixels, and a TFT is provided in each pixel. Counter-electrodes are provided on facing substrates holding liquid crystal between them, thus forming a kind of capacitor with the liquid crystal functioning as a dielectric. Next, with the switching function of the TFTs, electric charges accumulated in the capacitor are controlled. The electronic potential to be applied to the pixels is thus controlled and the liquid crystal is driven. The amount of transmitted or reflected light is controlled to display an image.
Particularly in a small-sized and high-definition transmission-type liquid crystal display device such as one used in a liquid crystal projector, as long as miniaturization and higher definition are demanded at the same time, continuous reduction in pixel size is fully anticipated. For example, to realize high-definition display of XGA (1024×768 pixels) in a liquid crystal display device of 0.7-inch diagonal type, each pixel has a very small area of 14 μm by 14 μm.
In the transmission-type liquid crystal display device, if sufficient capacitance is to be secured by forming a capacitor using a capacitance wiring in a pixel unit, the opening rate must be sacrificed. Currently, these problems are dealt with by increasing the opening rate for higher brightness and increasing the number of pixels for higher definition. However, it is an extremely difficult problem to design a pixel structure that can achieve both improvement in opening rate and increase in number of pixels and can secure sufficient capacitance while the pixel size becomes smaller.
As solutions for the foregoing problem, improvements are made in order to increase the opening rate, such as reduction in area of the TFT and the capacitor, which are dead spaces, reduction in width of the gate electrode and the source wiring, and reduction of the bonding margin between the TFT substrate and the facing substrates. Particularly, using a stack capacitor to reduce the area of the capacitor is effective as the foregoing solution. (Patent Literature 1).
A stack capacitor is a capacitor having a structure in which three or more layers of capacitance electrodes are stacked via two or more layers of dielectrics. Although only a structure with three layers of capacitance electrodes will be described in this specification, the stack capacitor is not limited to this structure and may have more capacitance electrodes. This specification mainly describes the case where a first capacitance electrode is formed simultaneously with a semiconductor layer of a TFT, a second capacitance electrode is formed simultaneously with a gate electrode, and a dielectric layer separating the two capacitance electrodes is a gate insulating film. However, the stack capacitor is not necessarily limited to this structure.
FIGS. 2A to 2E show a conventional method for preparing a stack capacitor. Using known techniques for patterning and etching, a semiconductor film formed on a substrate is selectively etched to form a semiconductor layer 14 of a TFT and a first capacitance electrode 15 of a stack capacitor. After that, an insulating film 13 to be a first dielectric is formed. Next, a gate electrode 32 and a second capacitance electrode 33 are formed. The second capacitance electrode 33 is a capacitance wiring with its electric potential fixed to ground potential or the like. After that, a second insulating film 34 to be a second dielectric is formed (FIG. 2A).
After a part of the first insulating film and the second insulating film is etched to form a contact hole 40, a second conductive film 35, which is to be a source electrode and a drain electrode as connection wirings and a third capacitance electrode, is formed to be connected with the semiconductor film 14 of the TFT (FIG. 2C).
Subsequently, the second conductive film is etched to form a source electrode, a drain electrode 41 and a third capacitance electrode 42, and then a third insulating film 36 is formed to cover the source electrode, the drain electrode, the second insulating film and the third capacitance electrode (FIG. 2D). After that, a part of the third insulating film is etched to form a contact hole that reaches the source electrode and the drain electrode, and then a third conductive film is formed and selectively etched to form a connection wiring 38 (FIG. 2E). Although not shown in FIGS. 1A to 1E, the first capacitance electrode 15 and the third capacitance electrode 42 are electrically connected with each other and are connected with the other wirings or TFT so as to be given a predetermined voltage.
In the capacitor, it is possible to hold more capacitance charges by reducing the thickness of the dielectric.
However, if the thickness of the dielectric is reduced, when forming the subsequent conductive film by a sputtering method, the dielectric is affected by the shock of sputtering and a defect tends to occur in the dielectric. Specifically, when forming the second capacitance electrode 33 and the third capacitance electrode 42, a defect occurs in the first dielectric 13 and the second dielectric 34 which are in contact with these electrodes. As a result, a short circuit may occur between the first capacitance electrode 15 and the second capacitance electrode 33 or between the second capacitance electrode 33 and the third capacitance electrode 42.
As the second conductive film 35 is formed on the insulating film 34, which is a dielectric, there arises a problem that the semiconductor film 14 of the TFT and the first capacitance electrode 15 are cracked by the stress of the conductive film 35.
To solve this problem, it may be considered to use a material that does not apply excessive stress to the substructure when forming the second conductive film. In this case, however, the material of the second conductive film is limited. For example, the case of using, as the second conductive film 35, a semiconductor film fed with phosphorus as an impurity element will be described. The semiconductor film fed with phosphorus and a semiconductor film forming an n-channel TFT can be electrically connected with each other. However, in the case of a semiconductor film forming a p-channel TFT, pn junction is generated and continuity cannot be achieved. Therefore, in the capacitance electrode of the n-channel TFT and the capacitance electrode of the p-channel TFT, conductive films made of different materials must be formed. This causes a problem of increased number of process steps.
Patent Literature 1:
JP-A-5-243519 (Pages 2 to 3, FIG. 1)